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 74LVQ157 Low Voltage Quad 2-Input Multiplexer
February 1992 Revised June 2001
74LVQ157 Low Voltage Quad 2-Input Multiplexer
General Description
The LVQ157 is a high-speed quad 2-input multiplexer. Four bits of data from two sources can be selected using the common Select and Enable inputs. The four outputs present the selected data in the true (non inverted) form. The LVQ157 can also be used as a function generator.
Features
s Ideal for low power/low noise 3.3V applications s Guaranteed simultaneous switching noise level and dynamic threshold performance s Guaranteed pin-to-pin skew AC performance s Guaranteed incident wave switching into 75.
Ordering Code:
Order Number 74LVQ157SC 74LVQ157SJ Package Number M16A M16D Package Description 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Devices also available in Tape and Reel. Specify by appending suffix letter "X" to the ordering code.
Logic Symbols
Connection Diagram
IEEE/IEC
Pin Descriptions
Pin Names I0a-I0d I1a-I1d E S Za-Zd Description Source 0 Data Inputs Source 1 Data Inputs Enable Input Select Input Outputs
(c) 2001 Fairchild Semiconductor Corporation
DS011352
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74LVQ157
Truth Table
Inputs E H L L L L S X H H L L I0 X X X L H I1 X L H X X Outputs Z L L H L H
Functional Description
The LVQ157 is a quad 2-input multiplexer. It selects four bits of data from two sources under the control of a common Select input (S). The Enable input (E) is active-LOW. When E is HIGH, all of the outputs (Z) are forced LOW regardless of all other inputs. The LVQ157 is the logic implementation of a 4-pole, 2-position switch where the position of the switch is determined by the logic levels supplied to the Select input. The logic equations for the outputs are shown below: Za = E * (I1a * S + I0a * S) Zb = E * (I1b * S + I0b * S) Zc = E * (I1c * S + I0c * S) Zd = E * (I1d * S + I0d * S) A common use of the LVQ157 is the moving of data from two groups of registers to four common output busses. The particular register from which the data comes is determined by the state of the Select input. A less obvious use is as a function generator. The LVQ157 can generate any four of the sixteen different functions of two variables with one variable common. This is useful for implementing gating functions.
H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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74LVQ157
Absolute Maximum Ratings(Note 1)
Supply Voltage (VCC) DC Input Diode Current (IIK) VI = -0.5V VI = VCC + 0.5V DC Input Voltage (VI) DC Output Diode Current (IOK) VO = -0.5V VO = VCC + 0.5V DC Output Voltage (VO) DC Output Source or Sink Current (IO) DC VCC or Ground Current (ICC or IGND) Storage Temperature (TSTG) DC Latch-Up Source or Sink Current
-0.5V to +7.0V -20 mA +20 mA -0.5V to VCC + 0.5V -20 mA +20 mA -0.5V to VCC + 0.5V 50 mA 200 mA -65C to +150C 100 mA
Recommended Operating Conditions (Note 2)
Supply Voltage (VCC) Input Voltage (VI) Output Voltage (VO) Operating Temperature (TA) Minimum Input Edge Rate (V/t) VIN from 0.8V to 2.0V VCC @ 3.0V 125 mV/ns 2.0V to 3.6V 0V to VCC 0V to VCC
-40C to +85C
Note 1: The "Absolute Maximum Ratings" are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The "Recommended Operating Conditions" table will define the conditions for actual device operation. Note 2: Unused inputs must be held HIGH or LOW. They may not float.
DC Electrical Characteristics
Symbol VIH VIL VOH Parameter Minimum High Level Input Voltage Maximum Low Level Input Voltage Minimum High Level Output Voltage VOL Maximum Low Level Output Voltage IIN IOLD IOHD ICC VOLP VOLV VIHD VILD Maximum Input Leakage Current Minimum Dynamic Output Current (Note 4) Maximum Quiescent Supply Current Quiet Output Maximum Dynamic VOL Quiet Output Minimum Dynamic VOL Maximum High Level Dynamic Input Voltage Maximum Low Level Dynamic Input Voltage VCC (V) 3.0 3.0 3.0 3.0 3.0 3.0 3.6 3.6 3.6 3.6 3.3 3.3 3.3 3.3 0.7 -0.4 1.7 1.6 4.0 0.8 -0.8 2.0 0.8 0.002 TA = +25C Typ 1.5 1.5 2.99 2.0 0.8 2.9 2.58 0.1 0.36 0.1 TA = -40C to +85C Guaranteed Limits 2.0 0.8 2.9 2.48 0.1 0.44 1.0 36 -25 40.0 V V V V V V A mA mA A V V V V VOUT = 0.1V or VCC - 0.1V VOUT = 0.1V or VCC - 0.1V IOUT = -50 A VIN = VIL or VIH (Note 3) IOH = -12 mA IOUT = 50 A VIN = VIL or VIH (Note 3) IOL = 12 mA VI = VCC, GND VOLD = 0.8V Max (Note 5) VOHD = 2.0V Min (Note 5) VIN = VCC or GND (Note 6)(Note 7) (Note 6)(Note 7) (Note 6)(Note 8) (Note 6)(Note 8) Units Conditions
Note 3: All outputs loaded; thresholds on input associated with output under test. Note 4: Maximum test duration 2.0 ms, one output loaded at a time. Note 5: Incident wave switching on transmission lines with impedances as low as 75 for commercial temperature range is guaranteed for. Note 6: Worst case package. Note 7: Max number of outputs defined as (n). Data inputs are driven 0V to 3.3V; one output at GND. Note 8: Max number of Data Inputs (n) switching. (n - 1) inputs switching 0V to 3.3V. Input-under-test switching: 3.3V to threshold (VILD), 0V to threshold (VIHD), f = 1 MHz.
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74LVQ157
AC Electrical Characteristics
TA = +25C Symbol Parameter VCC (V) tPLH tPHL tPLH tPHL tPLH tPHL tOSHL, tOSLH Propagation Delay S to Zn Propagation Delay S to Zn Propagation Delay E to Zn Propagation Delay E to Zn Propagation Delay In to Zn Propagation Delay In to Zn Output to Output Skew (Note 9) Data to Output 2.7 3.3 0.3 2.7 3.3 0.3 2.7 3.3 0.3 2.7 3.3 0.3 2.7 3.3 0.3 2.7 3.3 0.3 2.7 3.3 0.3 Min 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 CL = 50 pF Typ 84 7.0 7.8 6.5 8.4 7.0 7.8 6.5 6.0 5.0 6.0 5.0 1.0 1.0 Max 16.2 11.5 15.5 11.0 16.2 11.5 15.5 11.0 12.0 8.5 11.3 8.0 1.5 1.5 TA = -40C to +85C CL = 50 pF Min 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.0 1.0 1.0 1.0 Max 19.0 13.0 17.0 12.0 19.0 13.0 17.0 12.0 13.0 9.0 13.0 9.0 1.5 1.5 ns ns ns ns ns ns ns Units
Note 9: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH). Parameter guaranteed by design.
Capacitance
Symbol CIN CPD (Note 10) Parameter Input Capacitance Power Dissipation Capacitance Typ 4.5 34.0 Units pF pF VC = Open VCC = 3.3V Conditions
Note 10: CPD is measured at 10 MHz.
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74LVQ157
Physical Dimensions inches (millimeters) unless otherwise noted
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Package Number M16A
5
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74LVQ157 Low Voltage Quad 2-Input Multiplexer
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M16D Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 6 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com


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